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NanoBlog

A blog about anything nanotech

Physical Vapor Depositon Processes book reviews

morreale Thursday 28 of February, 2013
The Society of Vacuum Coaters has posted a collection of book reviews on Physical Vapor Deposition Processes that appeared in the SVC Bulletin. Summary reviews of around 14 books have been posted. I've been told that the full reviews will be posted shortly so check back occasionally.

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Nanotech Despair and Opportunity

morreale Tuesday 26 of February, 2013
I was fortunate enough to attend a NSTI conference on a whim and take the soft materials and self assembly course. The instructor presented such a compelling set of lectures that I've been hooked ever since (2006). I've earned a certificate in Nanoscale Material Science from the Stanford Center of Professional Development (SCPD). It's a wonderful program for working professionals allowing you to take distance learning courses from world class professors and be located anywhere in the world.

My aim is to build something nanotech but I go through the following cycle.

Figure showing state machine

Despair occurs with the realization that nanotech devices are hard to make, hard to verify, and measure its performance. On the other hand, if you can make these devices, then there seems to be endless opportunity. For help getting out of the despair state, I recommend the following website for inspiration.

http://etl.stanford.edu/ with login or the public site
http://ecorner.stanford.edu/

The web casts by these entrepreneurs are inspirational, educational, and instructive. My favorites are ones by people that launched whole new industries. The lecture by Jensen Huang is one example of how a company helped launch the video game industry since graphics chips for PCs did not exist in a way that would allow modern games to be played. One can only wonder what changes nanotechnology will bring about.

FD-SOI FETs

morreale Saturday 02 of February, 2013
ST Ericsson has posted a video describing their new Fully Depleted Silicon On Insulator FET technology (FD-SOI). It's a planar technology that incorporates a insulating layer under the source, drain, and channel of the FET. The advantage of this approach is that little or no channel dopents are used lowering the FET-to-FET variations, and it lowers leakage currents making devices much lower power than devices using bulk FET structures. A back gate is also included and used in combination with the top gate to allow control of the the FET performances for either high speed or low power. The FD-SOI process is now available at the 28 nm node and the 14 nm is presently in development.

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DIY Bio courses

morreale Thursday 31 of January, 2013
Genspace is offering courses in synthetic biology, biohacking, journalism, biotechnology, and bioart and textiles beginning in February though March.

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